8.3 Program Execution

A good understanding of program execution is essential for software development and hardware development. The program execution process is essentially a repeated cycle of fetching an instruction from memory and executing the instruction, and then repeating the process all over again. Thus the term fetch-execute cycle. Though the process appears simple there are several steps that take place during the cycle. To understand the process the inner workings of the CPU should be considered. The CPU is one physical unit, but with several parts within it. Each part within the CPU performs a function, and together as a unit perform the fetch- execute cycle. The block diagram in figure 8.2 outlines the various parts of a CPU.

In the Von Neumann Architecture the instructions and data are both stored in the same memory, so it is important to know exactly which addresses contain the instructions and which addresses contain the data. It is not possible to look at the contents of a particular memory address and determine whether it is an instruction or a piece of data, because both will be a sequence containing the digits 1 and 0. The instructions are stored in sequential order; that means if the first instruction is at address 1100 the next instruction will be at address 1101 and so on. Once the instructions have been loaded into memory through some kind of input process, and the processor has been triggered to perform the program the process is as follows: the process begins with the Program Counter (PC) which keeps track of the address of the instruction being processed by the processor. While the instruction is being executed, the contents of PC is incremented by 1 to point to the next instruction, which is why the instructions need to be kept in adjacent memory locations. The PC is assigned the first address of the instruction for the program execution to begin. This information is then transferred to the Memory Address Register (MAR), which then begins the fetch part of the fetch-execute cycle. At this point the information is picked up from memory and placed in the Memory Data Register (MDR). This is then transferred into the Information Register (IR). After which, the instruction is decoded and executed. Depending on the type of instruction the execution may require the use of the Arithmetic Logic Unit (ALU) in which case the data and operation information is passed on to the ALU. If the instruction simply moves data from one location to another then the ALU is not needed for the instruction to be executed. If the instruction produces a result that needs to be sent to memory, then the result is placed in the MDR and the memory location information is stored in the MAR. The MDR information is then transferred to the address specified by the MAR. At this point a single fetch- execute action has been performed. The processor then begins the cycle all over again with the new address in the PC.

Interrupt Requests 

In many applications the fetch execute cycle needs to be stopped temporarily to handle more urgent processing needs and improve processing efficiency. Urgent processing needs are usually time sensitive processing needs, where the information needs to be processed within strict time constraints. For example, sound information which loses meaning if it is not handled within certain time constraints.

Efficiency is also improved by not waiting for an event to take place before continuing with the processing. Imagine a program takes receives information from the keyboard. If the program has to remain idle waiting for the keyboard information it is not being efficient. Instead of waiting for the information it would be better to proceed with other tasks and pick up the information when it becomes available. To pick up such pieces of information from various IO devices the processing needs to be stopped temporarily.

To deal with such needs, interrupt requests (IRQ) are introduced. An IRQ allows a device to have priority access to the CPU to handle processing needs. When an IRQ comes through, the processor stores the information of the fetch execute cycle in registers within the CPU, and takes on the processing needs of the IRQ. The IRQ needs are essentially a sequence of instructions that need to be executed when an interrupt request is present. The execution of the IRQ instructions are done be the processor in the usual manner.  Once the processing need of the IRQ is completed, the processor then continues with the fetch execute cycle of the program by reloading the information for the original program from the registers. The fetch execute cycle with interrupt request could be represented using the flowchart shown figure 8.3.